Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications
PhD in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, Chemistry, or a closely related STEM field
With at least 1+ years of experience in
Working knowledge of one or more thin film deposition technologies such as ALD, CVD, PVD, sputtering, evaporation, electrochemical deposition, or related vacuum process technologies
Demonstrated ability to analyze process data using statistical methods, structured troubleshooting, and robust experimental design
Preferred Qualifications
Experience in thin film metal deposition process development for high-k/metal gate stack, contact metallization, or Cu interconnect barrier/liner/plating
Experience with materials characterization and metrology methods such as XRF, XPS, XRD, SEM, TEM, ellipsometry, e-test, defect inspection, reliability, and related techniques
Experience with MOSFET / FinFET / GAA / CFET device characteristics, electrical characterization techniques, and semiconductor device fundamentals
Proficient with data analysis software including JMP, Excel, Python, R, SQL
Strong communication and collaboration skills with demonstrated ability to solve challenging and ambiguous technical problems in a fast-moving and dynamic team environment
Experience using AI-assisted engineering tools to improve technical productivity while maintaining critical independent engineering judgement
Strong written and verbal communication skills with ability to document decisions, summarize technical data, and align cross-functional stakeholders
Availability to work on site and support 24/7 manufacturing operations with on-call rotation
For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information
Job Type
College Grad
Shift
Shift 1 (United States of America)
Primary Location
US, Oregon, Hillsboro
Additional Locations
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
- Work Model for this Role
- This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
