Debug issues in the presilicon environment, replicate failures, and implement corrective measures.
Collaborate with CPU architects, RTL developers, and physical design teams to optimize the verification process and achieve functional, performance, and power targets.
Document verification plans and lead technical reviews with design and architecture teams.
Maintain and enhance existing verification infrastructure and methodologies.
Actively contribute to the definition of CPU architecture and microarchitecture features.
Qualifications
Minimum Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
At least 4 years of experience in ASIC or FPGA design verification, preferably with CPU or E-Core designs.
Proficiency in verification languages such as System Verilog and UVM.
Strong scripting and programming skills (e.g., Python, C/C++).
Hands-on experience with industry-standard verification tools and methodologies.
Preferred Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or a related field with 3 years of relevant experience OR PhD with no prior professional experience.
Proven expertise in platform-level design verification and microprocessor-based systems.
Exceptional problem-solving and debugging skills.
Effective communication and collaboration abilities to work within dynamic, cross-functional teams.
We invite you to bring your skills, creativity, and enthusiasm to this exciting opportunity. Join us in driving innovation and shaping the future of computing.
Job Type
Experienced Hire
Shift
Shift 1 (Malaysia)
Primary Location
Malaysia, Penang
Additional Locations
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
- Work Model for this Role
- This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
