Intel
From Intel's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
The role involves logic design of component and foundation IPs which can be used to build an SoC chassis.
Intel is seeking an experienced Logic Design engineer for the Intel Chassis Group, which is chartered to deliver the chassis for SoCs within Intel. The role involves logic design of component and foundation IPs which can be used to build an SoC chassis. The ideal candidate will have strong design and Verilog skills and some background in protocol conversion bridges for AMBA/CXL protocols. Understanding of concepts such as QoS, access control, flow control, debug, RAS, security and error handling is a plus.
Develop logic designs, register transfer level (RTL) coding, and simulations required for functional units, IP blocks, and subsystems.
Define and implement architecture and microarchitecture features for the interconnect IP block and sub-system which includes high-performance data plane and control plane routers, switches, arbiters, protocol conversion bridges, debug/trace components, and clock and power controls.
Perform rigorous quality checks and optimization of RTL designs to improve IP power, performance, area, and timing, ensuring delivery of high-quality IP.
Evaluate design trade-offs across area, bandwidth, timing, and reliability to achieve balanced and efficient IP functionality.
Support Sub-system/SoC customers with high-quality IP integration and verification workflows.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in logic design and RTL development.
Proficiency in Verilog/System Verilog and RTL coding.
Expertise in AMBA (CHI, AXI, AHB, APB) and PCIe/CXL protocols.
Strong understanding of power, performance, Timing and area optimization strategies in complex designs.
5+ years of experience designing network components such as routers, switches, arbiters, or protocol conversion bridges.
Knowledge of debug/trace networks, flow control, and hashing methodologies.
Background in DVFS (Dynamic Voltage Frequency Scaling) and UPF (Unified Power Format).
Understanding of RAS (Reliability, Availability, and Serviceability) features.
Proven ability to collaborate across geographically distributed teams and adapt to multi-time zone working environments.
Familiarity with coherency concepts and memory subsystems.
Join Intel and contribute to transformative innovations in semiconductor design that shape the future of technology.
Experienced Hire
Shift 1 (India)
India, Bangalore
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
A free account lets you apply, save this job, see how well you match and check your resume against it.
Scores your resume against this job the way resume scanners do: the job's hard and soft skills, searchability, recruiter tips and formatting.
Create a free account to see your score. Your resume stays in this browser until then, and we never store it.
Already a member? Sign in