Hewlett Packard Enterprise
From Hewlett Packard Enterprise's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
Exciting opportunity for a Senior ASIC Physical Design Engineer to contribute to the development of high-performance integrated circuits. Key responsibilities include performing static timing analysis, driving timing closure, and collaborating with cross-functional teams. Ideal for candidates with significant ASIC and VLSI experience and strong technical expertise.
Skills: asic physical design, static timing analysis, synthesis, formal verification, netlist quality analysis, timing closure, floorplanning, chip partitioning, eda tools, design compiler, synopsys fusion compiler, primetime, formality, cadence rtl compiler, genus, lec, perl, python, tcl, vlsi principles, digital logic, circuit design, computer architecture, technical leadership, mentoring, cross-functional collaboration, problem solving, debugging
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