Hewlett Packard Enterprise
From Hewlett Packard Enterprise's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
You will collaborate with verification and physical design teams, focusing on micro-architecture and logic design.
We are currently hiring a Senior ASIC Design Engineer to define and architect high-performance blocks for advanced networking ASICs. You will collaborate with verification and physical design teams, focusing on micro-architecture and logic design. Ideal candidates possess strong Verilog RTL coding skills and experience in ASIC design for networking protocols.
Skills: verilog rtl coding, asic design, networking protocols, synopsys design compiler, verplex lec, spyglass, ethernet, high performance memory subsystems, multi-domain clock synchronization, high-speed serial interfaces, problem solving, asic debugging, fcoe, testplan development, prototype fabrication, design verification, design analysis, written communication, verbal communication, project leadership
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