From Google's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
In this role, you will be the dedicated software engineer owning our chip design infrastructure.
Google Quantum AI designs and fabricates its own superconducting quantum processors. Bringing a new chip from concept to fabrication is an iterative process: laying out circuits, running electromagnetic and circuit simulations, verifying designs against fabrication rules, and preparing tapeouts for the foundry. Every step depends on software, and as our processors grow in scale and complexity, the speed and reliability of that software determine how quickly we can iterate. In this role, you will be the dedicated software engineer owning our chip design infrastructure. Partnering closely with quantum processor designers in Santa Barbara, you will architect and maintain the software layers that power the design workflow.
You will balance high-leverage workflow unblocking for designers with long-term infrastructure roadmap projects, letting hardware and physics experts focus on processor design. The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $147000 - $210000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Own and evolve the backend of the quantum chip design repository, including CI/CD pipelines, cloud simulation job orchestration, and layout tool integrations.
Design and deliver infrastructure projects that shorten the processor design cycle, including CI acceleration, parallel simulation orchestration, and automated tapeout workflows.
Improve design reproducibility and end-to-end traceability by versioning design libraries and building artifact storage and data pipelines connecting design, fabrication, and test.
Serve as the primary software engineering partner for quantum chip designers, diagnosing workflow bottlenecks and shipping reliable tooling improvements.
Partner with device physicists and hardware engineering leads to scope infrastructure roadmaps, define system interfaces, and establish software quality standards.
Bachelor's degree in Computer Science, Electrical Engineering, Physics, a related technical field, or equivalent practical experience.
2 years of software development experience in Python, C++, Go, or Rust (or 1 year of experience with an advanced degree), including experience with Python.
2 years of experience building CI/CD pipelines, build systems, or developer infrastructure.
Experience with Linux, Git version control, and automated testing.
Master's degree or PhD in Computer Science, Electrical Engineering, Physics, or a related technical field.
Experience with cloud workflow orchestration or containerized compute workloads (e.g., Argo Workflows, Kubernetes, Docker) and HPC job scheduling.
Experience with electronic design automation (EDA) or IC layout tools (e.g., KLayout, GDSII), physical verification (DRC/LVS), or electromagnetic simulation.
Experience building engineering or scientific data pipelines, relational databases, or artifact stores.
Experience partnering directly with hardware engineers, device designers, or physicists to build internal developer tools and automation.
Bachelor's degree in Computer Science, Electrical Engineering, Physics, a related technical field, or equivalent practical experience.
2 years of software development experience in Python, C++, Go, or Rust (or 1 year of experience with an advanced degree), including experience with Python.
2 years of experience building CI/CD pipelines, build systems, or developer infrastructure.
Experience with Linux, Git version control, and automated testing.
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