Responsibilities may vary based on specific teams.
Minimum qualifications
Currently pursuing a PhD degree in Computer Engineering, Computer Science, Electronics and Communication Engineering, Electrical Engineering, or a related technical field.
Experience in programming languages (e.g., C++, Python, Verilog, UVM), Synopsys, and Cadence tools.
Experience in one or more of the following areas: hardware system integration, product design, computer architecture, digital design verification, digital circuits, ASIC physical design, FPGAs, embedded systems, memory systems.
Preferred qualifications
Currently attending a degree program in India and available to work full time for 12 weeks outside of university term time.
Experience with performance modeling tools, C++, Python or silicon design tools in front end/design verification/physical design.
Knowledge of arithmetic units, bus architectures, accelerators or memory hierarchies, computer architecture, linear algebra, or ML/DL background.
Knowledge of high performance and low power design techniques.
Currently pursuing a PhD degree in Computer Engineering, Computer Science, Electronics and Communication Engineering, Electrical Engineering, or a related technical field.
Experience in programming languages (e.g., C++, Python, Verilog, UVM), Synopsys, and Cadence tools.
Experience in one or more of the following areas: hardware system integration, product design, computer architecture, digital design verification, digital circuits, ASIC physical design, FPGAs, embedded systems, memory systems.
