We encourage you to apply if you have any of these preferred skills or experiences:
Responsibilities for This Position
Duties and Tasks
Leads ASIC verification at the block, subsystem, and full-chip levels.
Develops verification plans, schedules, coverage goals, and completion criteria.
Builds reusable SystemVerilog/UVM test environments and verification components.
Maintains traceability from requirements through test results and defect closure.
Plans and executes simulation, regression, formal verification, and emulation activities.
Drives coverage and regression results to predetermined completion goals.
Leads failure investigation, root-cause analysis, and corrective-action verification.
Verifies third-party and custom IP for functional and integration compliance.
Provides feedback to design and architecture teams on issues that affect verification.
Identifies verification risks and develops practical mitigation plans.
Presents verification status, evidence, risks, and recommendations at technical reviews.
Produces clear, accurate verification plans, procedures, and reports.
Improves verification processes, automation, metrics, and reusable assets.
Provides technical direction and mentoring to verification engineers.
Supports vendor oversight, proposals, estimates, and program planning as needed.
Uses approved AI-enabled tools where they provide clear engineering value and protect sensitive information.
Required Knowledge, Skills, and Abilities
Strong knowledge of ASIC and SoC verification processes.
Strong proficiency in SystemVerilog, UVM, assertions, coverage, and regression testing.
Experience developing reusable testbench components and register models.
Strong understanding of RTL, digital logic, interfaces, clocks, and resets.
Ability to convert requirements into measurable verification objectives and tests.
Experience debugging simulations and determining root causes.
Experience with scripting languages such as Perl, Tcl, Bash, and Python.
Experience with ASIC simulation and debug tools such as VCS, Verdi, Questa, or equivalent tools.