## Grow with us
About this opportunity
- Design Verification Engineer – AI & Agentic Workflows
- Austin, Texas
- Design Verification Engineer
ASIC, SoC & FPGA Verification Build the Verification Foundation for Next-Generation Custom Silicon Ericsson Silicon is looking for an innovative, results-driven Design Verification Engineer to architect, verify, and scale the custom IPs, ASICs, SoCs, and FPGA-based platforms powering next-generation communications infrastructure and Layer 1 accelerators. In this role, you won't just build traditional testbenches—you will pioneer and leverage AI-driven verification methodologies and agentic workflows to supercharge test generation, automate complex debug loops, and accelerate coverage closure. You will work closely with architects, RTL designers, emulation teams, and system engineers to identify issues early, reduce tapeout cycles, and deliver exceptionally high-quality custom silicon. This is an opportunity to make a direct impact on complex designs spanning OSI Layer 1 Accelerators, custom baseband DSPs, AI/ML inference blocks, RISC-V/ARM cores, and high-speed multi-gigabit interfaces. What You’ll Do Define Verification Strategies: Spearhead verification plans, environments, and schedules for complex Layer 1 accelerator ASICs, SoCs, and FPGA platforms. Architect Reusable UVM Environments: Build advanced, highly reusable UVM-based verification environments using SystemVerilog, integrated with LLM-assisted test generation and intelligent stimulus models. Deploy Agentic Workflows: Utilize and help develop AI agentic frameworks (e.g., LLM agents integrated into CI/CD pipelines) to autonomously triage regression failures, draft test sequences, and parse complex log files. Drive Coverage Closure with ML: Drive functional, code, and assertion coverage closure utilizing machine learning-guided constrained-random and formal verification techniques. Automate & Optimize CI/CD Pipelines: Build and maintain intelligent verification infrastructure using Python, Tcl, shell scripting, Jenkins, Git, and AI-augmented CI/CD automation pipelines. Multi-Environment Validation: Verify RTL and gate-level designs seamlessly across software simulation, hardware emulation, FPGA prototyping, and post-silicon environments. Advanced Debug & Root Cause Analysis: Leverage AI-assisted log analysis and pattern recognition tools to debug intricate issues across RTL, gate-level netlists, and hardware-software co-simulation platforms. Interface & Protocol Verification: Validate performance and functionality across custom Ericsson-Proprietary Interfaces, AMBA, PCIe, DDR, Ethernet, and high-speed SerDes. Methodology Innovation: Actively contribute to Ericsson Silicon’s verification methodology evolution, embedding generative AI and automation tools into daily workflows to optimize KPIs. Technical Leadership & Mentorship: Mentor junior engineers on both foundational verification techniques and modern AI/agentic
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## Join our Team
About this opportunity
development tools to elevate team productivity.
What You'll Bring
Education: Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline. Experience: 6+ years of professional design verification experience for complex ASIC, SoC, FPGA, or semiconductor products. Core Verification Expertise: Strong programming experience with SystemVerilog/Verilog and hands-on expertise developing and maintaining UVM-based environments. Methodology Mastery: Deep understanding of constrained-random verification, assertion-based verification, scoreboards, checkers, and coverage-driven signoff. Modern Tooling & Scripting: Strong scripting and automation skills using Python, Tcl, Perl, or shell scripting; experience with Git, Jenkins, and CI/CD pipelines. Layer 1 & Architecture Insight: Understanding of SoC/ASIC architectures, with specific exposure to Layer 1 accelerators, DSPs, AI/ML accelerators, RISC-V, or ARM Cortex processors. Protocol Knowledge: Experience verifying standard interfaces such as AMBA AXI/AHB/APB, PCIe, DDR, Ethernet, or SerDes. Collaboration & Communication: Strong written and verbal communication skills with a proven track record of cross-functional collaboration. Highly Desired Qualifications & AI Skills Agentic Workflows & Generative AI: Practical experience integrating LLMs, custom coding assistants, or autonomous AI agents into hardware design, test generation, or debug loops. Advanced Automation: Experience building custom Python-based automation frameworks that interface with EDA APIs or parse large-scale regression datasets using machine learning. Formal Verification: Experience with formal or semi-formal verification tools such as JasperGold. Low-Power & Timing: Knowledge of clock-domain crossing (CDC), reset-domain crossing (RDC), low-power verification (UPF/CPF), or simulation-to-silicon correlation. Software Fluency: Exposure to C/C++, assembly (RISC-V/ARM), or hardware-software co-verification. Agile Engineering: Familiarity with Jira, Confluence, and Agile development methodologies in semiconductor environments. Why Join Ericsson Silicon? At Ericsson Silicon, you will work on mission-critical hardware programs where verification quality directly dictates the performance of global 5G and future networks. By combining deep hardware fundamentals with cutting-edge AI and agentic workflows, you will help redefine how high-performance custom silicon is verified, debugged, and brought to market.
