Comtech Cyberstronger
From Comtech Cyberstronger's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
Job Title: Senior FPGA Engineer III
Department: Engineering->Platforms->FPGA SoC Group
Reports To: Director, Platforms
FLSA Status: Exempt
Last Modified: 9/10/2025
Level: T3
Location Chandler, AZ – Onsite 5 Days a week
Company Overview
Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the world’s most innovative communications solutions. For more information, please visit www.comtech.com.
We’re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If you’re invigorated by our mission, values, and drive to change the world — we’d love to have you apply.
Position Summary
Senior FPGA Designer with experience in the entire design flow for complex FPGA’s.
IP Integration into FPGA Projects (synthesis/implementation)
High-Performance FPGA IP (VHDL/SystemVerilog)
Userspace Drivers for FPGA IP (C++)
Firmware for Embedded Microcontrollers (C)
Utilize strong communication skills to effectively work and communicate with team members and engineering management.
Strong digital design engineer with FPGA/ASIC SoC design experience
Strong FPGA Implementation with Altera Quartus or Xilinx Vivado
Experience designing/debugging SoC systems with AMBA-compliant AXI and APB interfaces
Experience designing fmax-optimized, high-throughput, pipelined AXI-Stream IP
Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Knowledgeable in Static Timing Analysis (STA) and Synopsis Design Constraints (SDC)
Experience analyzing STA reports and post-synth netlist/placement to resolve failing paths
Experience contributing to schematic capture and layout for FPGA portions of PCB designs
PCI Express, Interlaken, USB SuperSpeed
1000BASE-X/SGMII, 10GBASE-R, 40GBASE-4, 100GBASE-R4
L1: IEEE 802.3, Cisco, Q/SFP+ MSA standards for Ethernet (1G to 100G)
L2/L3: IPv4, IPv6, ARP, ICMP, IGMP, UDP, TCP
Proficient in SW development with C, C++ and GIT version control
Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.)
Demonstrated experience supporting multi-disciplinary, cross functional and matrixed teams
Desired Qualifications
Working knowledge of digital IF streams such as VITA 49.2, DIFI and/or eCPRi (Highly Desired)
Working knowledge of Embedded Linux: Kernel / Yocto / U-Boot / DeviceTree
Working knowledge with SATCOM waveforms like DVB-S2X and/or 5G NTN 3GPP Rel 17/18
Working knowledge of communication networks and security within a zero-trust environment
Experience with Partial Reconfiguration/DFX or PCIe CvP
Possess an active DoD clearance or demonstrate readiness to obtain one
Bachelors in Electrical or Computer Engineering (or related degree).
5+ years of FPGA/ASIC SoC design experience.
Comtech Telecommunications Corp. is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability protected veteran status or other characteristics protected by law.
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