Job responsibilities
BE/BTECH/ME/MTECH Or Equivalent Degree
Job description – Memory Design Engineer ( 15-25 yrs )
Location : Hyderabad
Cadence is recruiting highly motivated Memory Designers to work in the Memory IP team based in Hyderabad.
The roles and responsibilities will include the design, simulation and verification of custom memory design blocks.
Job role
Circuit design & simulation of memory circuits
Characterization
Functional simulations and statistical analysis
Sign off and release the memory IP s
Designing circuits for Memory testchip
Silicon bring-up and characterization.
Required Qualifications
Experience in SRAM/ROM/TCAM Memory designs
Requires Bachelor/Masters/ PhD in Electrical,VLSI, Microelectronics 15years of experience.
Proficient knowledge of and experience with Cadence, Mentor Graphics, Synopsys tools for schematic design & simulations.
Experience in timing characterization
General concepts around Circuit design, Reliability analysis, Statistical analysis of circuits should be good.
Good technical verbal and written communication skills
Ability to work with cross functional teams
Ability to handle concurrent projects.
Preferred Qualifications
Knowledge in various technologies like Bulk, CMOS & SOI process is desirable
Hands on knowledge of state-of-the-art memory or analog design flows
Programming experience applicable to design flow automation tasks
Exposure to 2nm, 3nm, 5nm technology nodes is an advantage.
Exceptional Spoken and Written Proficiency in English
Strong analytical and problem-solving skills.
We’re doing work that matters. Help us solve what others can’t.
