Be expected to demonstrate skills and abilities to lead and drive results & improvements, multitask and deliver high quality solutions in a timely fashion.
Write model templates for integration into memory compilers to generate models used in DFT/CAD tools used in ASIC development flows.
Participate in forums for model development, improvement and reviews, and will serve as a knowledge resource for peers, colleagues, and subordinates in the organization.
Be expected to communicate well, document well, prioritize tasks and handle the multiple facets of model development projects independently to meet the business goals and commitments.
Work to improve memory models and model generation flows for better performance, user experience and quality.
Work directly with IP design teams, compiler teams and tool vendors globally to help resolve model related issues, and find timely solutions.
Respond to library support requests and address tickets on model issues from product teams across Broadcom.
Qualifications
The minimum engineering experience required is typically a BS degree in EE/CS/CE with programming/coding experience with 8+ years of industry experience, or an MS degree with 6+ or Ph.D. degree in EE/CS with 3+ years of industry experience.
Have at least 3 years experience using Linux systems; possess excellent knowledge of Linux commands, file systems, and job execution.
Strong preference for 5+ years of experience in Verilog modeling skills
Static & Dynamic timing analysis knowledge.
Experience with chip design tools and design flows, such as
DFT: Tessent, LogicVision, Modus, manufacturing test flows: at-speed scan test, Logic BIST, Memory BIST
Synthesis: Design Compiler, Genus.
Simulation: VCS, Questa, Verilog, waveform viewers, and simulation debug.
UVM verification tetsbench and methodology development
Conversant with Verilog/RTL/Behavioral/Timing/Power/DFT/ATPG/Synthesizable model development for SRAMs/RF/CAM/ROM, etc. memories.
Experience in writing directed test bench in verilog for model verification.
Knowledge and experience using simulators - NC, VCS, ModelSim, ESPCV is a must.
Familiarity with memory model verification/QC flow is required.
Scripting & flow automation, Perl, Python, Tcl, Shell programming skills are required.
Able to work in agile and dynamic development environments.
Excellent written and verbal communication skills.
Skilled multi-tasking abilities and context switching skills are a must.
Strong analytical, problem solving and quick learning skills are required.
Good team player, methodical, eye for detail, independent, well organized, and have the ability to remain calm and composed in high pressure situations.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
