Broadcom
From Broadcom's careers page
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Write and maintain assertions and DV tests for chip-level and block-level models
Gather design data from circuit designers
Create netlists and use AI to create models, including real-number models
Write tests to verify the models
Write code to automate tasks
Bachelor's degree in Computer Science, Electrical Engineering or a related field
Minimum of 2 years of relevant experience
Working knowledge of Verilog/SystemVerilog
Working knowledge of the Linux operating system
Familiarity with Cadence Virtuoso
Proficiency with Python, Git, JIRA, Windows and the Google Office suites
Strong track record of collaborating with different teams
Verilog/SystemVerilog, real-number modeling, Python, Cadence Virtuoso, cross-team communication and coordination
The annual base salary range for this position is USD 74,000.00 To USD 118,800.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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