The ideal candidate has strong board-level design experience and professional proficiency with the Cadence design environment, along with a solid understanding of computer architecture, high-speed interfaces, signal integrity, power delivery, and system-level hardware design.
You should be comfortable working in an environment where requirements evolve quickly and priorities can change. Strong communication, organization, and cross-functional collaboration skills are essential, along with the ability to make sound engineering decisions and drive designs to closure.
KEY RESPONSIBILITIES
Lead and contribute to the development of Data Center GPU systems and accelerator cards, from architecture through production readiness.
Partner with silicon architecture teams to define system architecture, platform requirements, interfaces, and technical product specifications.
Drive board-level electrical design, including schematic development, component selection, design reviews, and design verification.
Work with program management and engineering teams to establish development schedules, milestones, dependencies, and technical deliverables.
Collaborate with component and technology vendors on circuit implementation, component selection, technical reviews, and issue resolution.
Oversee PCB layout and partner with Signal Integrity and Power Integrity teams to implement high-speed routing requirements, power-delivery solutions, and design constraints.
Work with manufacturing, validation, and test teams to ensure robust Design for Manufacturing and Design for Test implementation.
Perform or drive component derating, design-margin analysis, and board-level verification.
Plan and lead board bring-up, hardware validation, root-cause analysis, and complex system debugging.
Use oscilloscopes and other laboratory instrumentation to characterize and debug high-speed interfaces, power systems, and board-level hardware.
Provide technical leadership during design reviews and drive engineering issues to clear, timely resolution.
PREFERRED EXPERIENCE
Hands-on design experience with Data Center GPU, accelerator, server, or other high-performance compute platforms.
Understanding of modern AI data center rack architecture, including compute, networking, management, power, and system-level building blocks.
Strong experience with Cadence schematic capture, PCB design, and related design and constraint-management tools.
Experience designing and debugging high-speed interfaces such as PCI Express, XGMI, LPDDR, and other multi-gigabit SerDes technologies.
Strong knowledge of high-speed PCB design, signal integrity, PHY architecture, transmitter equalization, receiver signal processing, channel analysis, and eye-diagram measurements.
Experience working with power-delivery networks, voltage regulation, sequencing, telemetry, and board-level power architectures.
Familiarity with platform-management technologies and firmware interfaces such as Redfish and system telemetry.
Experience developing or integrating FPGA-based subsystems, including RTL, FPGA configuration, validation, and test environments.
Experience with BOM management, component lifecycle management, and engineering change processes.
Demonstrated ability to lead complex hardware debugging using digital oscilloscopes and other common electrical laboratory equipment.
Several years of hands-on hardware design and product-development experience, preferably involving complex multilayer PCB systems.
ACADEMIC CREDENTIALS
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related technical discipline.
LOCATION: Austin, TX
This role is not eligible for sponsorship
#LI-TL1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
We are seeking an experienced Hardware Design Engineer to join our Data Center Systems Engineering team and help develop the next generation of high-performance GPU platforms for AI and data center applications.
In this role, you will have significant technical ownership, from system architecture and board design through layout, bring-up, validation, and production readiness. You will work on complex, high-performance hardware and collaborate closely with silicon architecture, signal integrity, power, mechanical, firmware, manufacturing, validation, and program management teams.
This is a highly visible role in a fast-paced engineering environment, offering the opportunity to solve challenging hardware problems and directly influence future AI infrastructure.
THE PERSON
We are looking for a self-driven, collaborative, and technically strong hardware engineer who enjoys solving complex problems and taking ownership from concept through successful hardware bring-up.
The ideal candidate has strong board-level design experience and professional proficiency with the Cadence design environment, along with a solid understanding of computer architecture, high-speed interfaces, signal integrity, power delivery, and system-level hardware design.
You should be comfortable working in an environment where requirements evolve quickly and priorities can change. Strong communication, organization, and cross-functional collaboration skills are essential, along with the ability to make sound engineering decisions and drive designs to closure.
KEY RESPONSIBILITIES
Lead and contribute to the development of Data Center GPU systems and accelerator cards, from architecture through production readiness.
Partner with silicon architecture teams to define system architecture, platform requirements, interfaces, and technical product specifications.
Drive board-level electrical design, including schematic development, component selection, design reviews, and design verification.
Work with program management and engineering teams to establish development schedules, milestones, dependencies, and technical deliverables.
Collaborate with component and technology vendors on circuit implementation, component selection, technical reviews, and issue resolution.
Oversee PCB layout and partner with Signal Integrity and Power Integrity teams to implement high-speed routing requirements, power-delivery solutions, and design constraints.
Work with manufacturing, validation, and test teams to ensure robust Design for Manufacturing and Design for Test implementation.
Perform or drive component derating, design-margin analysis, and board-level verification.
Plan and lead board bring-up, hardware validation, root-cause analysis, and complex system debugging.
Use oscilloscopes and other laboratory instrumentation to characterize and debug high-speed interfaces, power systems, and board-level hardware.
Provide technical leadership during design reviews and drive engineering issues to clear, timely resolution.
PREFERRED EXPERIENCE
Hands-on design experience with Data Center GPU, accelerator, server, or other high-performance compute platforms.
Understanding of modern AI data center rack architecture, including compute, networking, management, power, and system-level building blocks.
Strong experience with Cadence schematic capture, PCB design, and related design and constraint-management tools.
Experience designing and debugging high-speed interfaces such as PCI Express, XGMI, LPDDR, and other multi-gigabit SerDes technologies.
Strong knowledge of high-speed PCB design, signal integrity, PHY architecture, transmitter equalization, receiver signal processing, channel analysis, and eye-diagram measurements.
Experience working with power-delivery networks, voltage regulation, sequencing, telemetry, and board-level power architectures.
Familiarity with platform-management technologies and firmware interfaces such as Redfish and system telemetry.
Experience developing or integrating FPGA-based subsystems, including RTL, FPGA configuration, validation, and test environments.
Experience with BOM management, component lifecycle management, and engineering change processes.
Demonstrated ability to lead complex hardware debugging using digital oscilloscopes and other common electrical laboratory equipment.
Several years of hands-on hardware design and product-development experience, preferably involving complex multilayer PCB systems.
ACADEMIC CREDENTIALS
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related technical discipline.
LOCATION: Austin, TX
This role is not eligible for sponsorship
#LI-TL1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
