Develop circuit-level solutions including transistor sizing, topology optimization, electrical debugging, and design tradeoff analysis for standard cell libraries.
Drive characterization methodologies for timing, power, noise, variation, reliability, and electromigration modeling using industry-standard tools such as Synopsys PrimeLib and Cadence Liberate.
Generate, validate, and release high-quality library deliverables including Liberty, CCS, LVF, LEF, OA, extracted netlists, and reliability views required for implementation and signoff flows.
Define characterization requirements, validation methodologies, quality metrics, and signoff criteria to ensure accurate, robust, and silicon-correlated models.
Evaluate and qualify EDA tools and methodologies, working closely with vendors including Synopsys, Cadence, Siemens, and Ansys to drive product improvements, feature enhancements, and technology enablement.
Develop automation, infrastructure, and scalable workflows using Python, Perl, and Linux scripting to improve efficiency, quality, and productivity across library development and characterization activities.
Collaborate with library designers, CAD teams, foundries, implementation engineers, and product groups to translate design requirements into robust and scalable library solutions.
PREFERRED EXPERIENCE
Experience across multiple technology generations.
Experience working directly with EDA vendors.
Recognized technical expert in standard cell design, characterization, and library enablement.
Deep expertise with Synopsys PrimeLib and/or Cadence Liberate is strongly preferred.
ACADEMIC CREDENTIALS
Bachelors or Masters in Electrical Engineering or Computer Science is preferred
This position is not eligible for visa sponsorship.
#LI-BM1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
We are seeking an experienced Standard Cell Design & Characterization Engineer to join our department, which is responsible for developing standard cell libraries, supporting third-party standard cell IP, and enabling process characterization infrastructure for all AMD products. These libraries must meet aggressive performance, power, area, reliability, and cost targets across advanced semiconductor technologies.
THE PERSON
The ideal candidate will bring expertise spanning standard cell design, characterization methodology development, library enablement, and EDA tool evaluation. Expert understanding of CMOS circuit design, semiconductor device physics, and advanced fabrication processes. Ability to bridge design requirements with CAD implementation and methodology development.
KEY RESPONSIBLITIES
Design, analyze, and optimize standard cell architectures to achieve performance, power, area, reliability, and manufacturability targets in advanced semiconductor technologies.
Develop circuit-level solutions including transistor sizing, topology optimization, electrical debugging, and design tradeoff analysis for standard cell libraries.
Drive characterization methodologies for timing, power, noise, variation, reliability, and electromigration modeling using industry-standard tools such as Synopsys PrimeLib and Cadence Liberate.
Generate, validate, and release high-quality library deliverables including Liberty, CCS, LVF, LEF, OA, extracted netlists, and reliability views required for implementation and signoff flows.
Define characterization requirements, validation methodologies, quality metrics, and signoff criteria to ensure accurate, robust, and silicon-correlated models.
Evaluate and qualify EDA tools and methodologies, working closely with vendors including Synopsys, Cadence, Siemens, and Ansys to drive product improvements, feature enhancements, and technology enablement.
Develop automation, infrastructure, and scalable workflows using Python, Perl, and Linux scripting to improve efficiency, quality, and productivity across library development and characterization activities.
Collaborate with library designers, CAD teams, foundries, implementation engineers, and product groups to translate design requirements into robust and scalable library solutions.
PREFERRED EXPERIENCE
Experience across multiple technology generations.
Experience working directly with EDA vendors.
Recognized technical expert in standard cell design, characterization, and library enablement.
Deep expertise with Synopsys PrimeLib and/or Cadence Liberate is strongly preferred.
ACADEMIC CREDENTIALS
Bachelors or Masters in Electrical Engineering or Computer Science is preferred
This position is not eligible for visa sponsorship.
#LI-BM1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
