Drive collaboration across Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early hardware validation, software bring-up, and functional coverage goals.
Provide technical leadership for Emulation engineers through mentoring, design reviews, best-practice development, project planning, and execution of key program milestones.
Establish engineering processes, implementation methodologies, documentation standards, and continuous improvement initiatives to improve efficiency, quality, and scalability.
Represent the Emulation team in architecture reviews, program reviews, and customer-facing technical discussions while partnering with EDA and FPGA tool vendors to drive technology adoption and resolve complex technical challenges.
PREFERRED QUALIFICATIONS
Proven experience leading Emulation efforts for large-scale semiconductor programs.
Strong SystemVerilog and/or Verilog design and validation experience.
Hands-on experience with Synopsys Zebu and/or Cadence Palladium platforms.
Proven background of experience in FPGA design, implementation, and SoC prototyping.
Strong knowledge of SoC bring-up, and high-speed interfaces such as PCIe, DDR, Ethernet, USB, and HBM.
Expert proficiency with AMD/Xilinx Vivado and Vitis toolchains.
Deep expertise in design reviews, modelling ASIC components which cannot be used on emulators, Coverage and power analysis on emulators.
Solid understanding of modern SoC architectures, including CPUs, cache hierarchies, memory subsystems, NoC/interconnects, and I/O protocols such as AXI, ACE, CHI, PCIe, and DDR.
ACADEMIC CREDENTIALS
Bachelors or Masters degree in computer engineering/Electrical Engineering
This role is not eligible for visa sponsorship.
#LI-AB2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.
THE PERSON
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES
Define and own the Emulation architecture, methodology roadmap, and platform strategy for complex SoCs, including partitioning, interconnects, clocking, debug infrastructure, and high-speed interfaces.
Lead the development and deployment of Emulation platforms, including RTL adaptation, implementation flows, verification infrastructure, regression environments, and system-level debug capabilities.
Drive collaboration across Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early hardware validation, software bring-up, and functional coverage goals.
Provide technical leadership for Emulation engineers through mentoring, design reviews, best-practice development, project planning, and execution of key program milestones.
Establish engineering processes, implementation methodologies, documentation standards, and continuous improvement initiatives to improve efficiency, quality, and scalability.
Represent the Emulation team in architecture reviews, program reviews, and customer-facing technical discussions while partnering with EDA and FPGA tool vendors to drive technology adoption and resolve complex technical challenges.
PREFERRED QUALIFICATIONS
Proven experience leading Emulation efforts for large-scale semiconductor programs.
Strong SystemVerilog and/or Verilog design and validation experience.
Hands-on experience with Synopsys Zebu and/or Cadence Palladium platforms.
Proven background of experience in FPGA design, implementation, and SoC prototyping.
Strong knowledge of SoC bring-up, and high-speed interfaces such as PCIe, DDR, Ethernet, USB, and HBM.
Expert proficiency with AMD/Xilinx Vivado and Vitis toolchains.
Deep expertise in design reviews, modelling ASIC components which cannot be used on emulators, Coverage and power analysis on emulators.
Solid understanding of modern SoC architectures, including CPUs, cache hierarchies, memory subsystems, NoC/interconnects, and I/O protocols such as AXI, ACE, CHI, PCIe, and DDR.
ACADEMIC CREDENTIALS
Bachelors or Masters degree in computer engineering/Electrical Engineering
This role is not eligible for visa sponsorship.
#LI-AB2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
