KEY RESPONSIBILITIES
Program & Execution Leadership
Lead end-to-end execution of multiple Data Center GPU / MI package design programs, ensuring schedule, quality, and cost targets are consistently met.
Drive execution in fast-paced, dynamic, and high-pressure environments, managing competing priorities across programs.
Establish and maintain robust execution frameworks, including milestone tracking, risk management, and readiness gates.
Interface with senior leadership to provide clear program status, risks, and mitigation strategies.
Team Leadership & Development
Lead, mentor, and grow a high-performing team of package design engineers across geographies.
Foster a culture of accountability, innovation, and continuous improvement aligned with AMD engineering excellence.
Conduct performance reviews, talent development planning, and succession management.
Technical & Cross-Functional Leadership
Collaborate with silicon, SI/PI, thermal, mechanical, and manufacturing teams to ensure design convergence.
Engage with OSAT and substrate vendors to drive design feasibility, manufacturability, and yield optimization.
Process & Methodology Innovation
Define and drive improved design methodologies, workflows, and best practices to enhance execution efficiency.
Champion adoption of AI/ML-enabled tools and automation (e.g., layout optimization, design rule checking, predictive analytics) to improve productivity and decision-making.
Scale digital transformation initiatives within the package design organization.
PREFERRED EXPERIENCE
Experience in semiconductor package design, with strong focus on high-performance or data center products.
Proven experience leading teams and executing multiple concurrent complex projects in fast-paced environments.
Strong understanding of package layout, high-speed design considerations, and multi-die integration.
Experience with AI/ML applications in engineering workflows (design automation, data analytics, optimization).
Excellent leadership, communication, and stakeholder management skills.
Demonstrated ability to handle ambiguity, drive decisions, and deliver under pressure.
Experience working with OSATs, substrate vendors, and manufacturing partners.
Hands-on experience with industry tools such as Synopsys 3DICC, Cadence SiP / APD or equivalent.
Experience in Data Center GPU, HPC, or advanced packaging technologies (e.g., chiplets, 2.5D/3D integration).
EDUCATION REQUIREMENTS: B.S. or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field.
This role is not eligible for visa sponsorship.
#LI-AP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
Help turn “possibility” into “reality” by leading the design execution of next-generation Data Center GPU and MI programs. This role represents a critical leadership position responsible for delivering high-performance, high-complexity package designs in a fast-paced environment.
In this role you will lead cross-functional teams across design, Signal/Power Integrity, substrate vendors, OSAT partners, and program management to ensure successful execution of multiple concurrent programs. You will drive operational excellence, scale execution using automation and AI-enabled methodologies, and deliver best-in-class package solutions that meet aggressive timelines and technical requirements.
THE PERSON
The ideal candidate will have excellent program management and leadership skills. Can work with global cross functional teams in a fast paced environment and someone who can excel at influencing.
KEY RESPONSIBILITIES
Program & Execution Leadership
Lead end-to-end execution of multiple Data Center GPU / MI package design programs, ensuring schedule, quality, and cost targets are consistently met.
Drive execution in fast-paced, dynamic, and high-pressure environments, managing competing priorities across programs.
Establish and maintain robust execution frameworks, including milestone tracking, risk management, and readiness gates.
Interface with senior leadership to provide clear program status, risks, and mitigation strategies.
Team Leadership & Development
Lead, mentor, and grow a high-performing team of package design engineers across geographies.
Foster a culture of accountability, innovation, and continuous improvement aligned with AMD engineering excellence.
Conduct performance reviews, talent development planning, and succession management.
Technical & Cross-Functional Leadership
Collaborate with silicon, SI/PI, thermal, mechanical, and manufacturing teams to ensure design convergence.
Engage with OSAT and substrate vendors to drive design feasibility, manufacturability, and yield optimization.
Process & Methodology Innovation
Define and drive improved design methodologies, workflows, and best practices to enhance execution efficiency.
Champion adoption of AI/ML-enabled tools and automation (e.g., layout optimization, design rule checking, predictive analytics) to improve productivity and decision-making.
Scale digital transformation initiatives within the package design organization.
PREFERRED EXPERIENCE
Experience in semiconductor package design, with strong focus on high-performance or data center products.
Proven experience leading teams and executing multiple concurrent complex projects in fast-paced environments.
Strong understanding of package layout, high-speed design considerations, and multi-die integration.
Experience with AI/ML applications in engineering workflows (design automation, data analytics, optimization).
Excellent leadership, communication, and stakeholder management skills.
Demonstrated ability to handle ambiguity, drive decisions, and deliver under pressure.
Experience working with OSATs, substrate vendors, and manufacturing partners.
Hands-on experience with industry tools such as Synopsys 3DICC, Cadence SiP / APD or equivalent.
Experience in Data Center GPU, HPC, or advanced packaging technologies (e.g., chiplets, 2.5D/3D integration).
EDUCATION REQUIREMENTS: B.S. or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field.
This role is not eligible for visa sponsorship.
#LI-AP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
