KEY RESPONSIBILITIES
System-Level Validation: Define and drive the silicon-to-solution validation strategy — plans, coverage, regression, and signoffs. Bring up baremetal and embedded Linux to exercise the full system. Write firmware and low-level system software for on-chip ARM (APU/RPU) or RISC-V cores. Build and customize embedded Linux images using the Yocto-based Embedded Design Flow (BSP configuration, device trees, kernel/rootfs tuning, custom recipes and layers).
Board Bring-Up & Validation: Own new board bring-up from first power-on through a stable platform. Build the scripts, baremetal code, and debug flows the boards team needs to complete bring-up and validation.
Test Development & Automation: Develop validation tests and applications in baremetal and Linux environments, and automate execution and regression to scale coverage.
Debug: Debug complex issues that span silicon, firmware, drivers, and the operating system.
Cross-Team Collaboration & Signoff: Partner with architecture, design, verification, software, product engineering, and board teams. Drive production readiness, issue tracking, risk assessment, and validation signoff.
PREFERRED EXPERIENCE
Hands on embedded systems and hardware validation experience.
Proven board bring-up and validation experience — taking a new board from power-on through boot and interface bring-up, and debugging clocking, reset, power, and hardware issues on the bench.
Strong C/C++ for bare-metal and Linux-based embedded systems on ARM or RISC-V cores; Linux kernel-mode driver knowledge is a strong plus.
Hands-on experience with AMD/Xilinx embedded Linux flows: building and customizing images with the Yocto-based Embedded Design Flow (BSPs, device trees, custom recipes/layers).
Experience validating interfaces such as Ethernet, USB, plus common peripherals like SPI, I²C, UART, and CAN.
Working knowledge of AMD/Xilinx Vitis and EDF environments.
Comfortable automating in Python, Tcl, Shell, and Makefiles, with Git and structured CI/regression workflows.
Strong ownership and communication, with a track record of technical leadership and mentoring.
ACADEMIC CREDENTIALS
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or Computer Science.
LOCATION: San Jose, CA
This role is not eligible for visa sponsorship.
#LI-DR2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
Help bring to life the foundational FPGA and adaptive SoC platforms enabling the next generation of physical AI and advanced embedded applications.
Join our team to own embedded designs for post-silicon system-level validation and board bring-up for FPGA and SoC-based platforms. The work spans networking, storage, automotive, aerospace, and emerging AI/ML workloads. You'll be a senior individual contributor writing firmware and software for taking new boards from first power-on to a stable, validated platform. You'll set the technical direction for how we validate, debug, and sign off silicon-to-solution across hardware and software.
THE PERSON
You understand how firmware, silicon, and hardware interact, and you can follow a failure across all three. You bring deep hands-on hardware bring-up and validation experience, strong analytical instincts, and the judgment to know what production readiness looks like for a platform. You work well with global teams, communicate clearly, and you go looking for the hard, ambiguous problems rather than around them.
KEY RESPONSIBILITIES
System-Level Validation: Define and drive the silicon-to-solution validation strategy — plans, coverage, regression, and signoffs. Bring up baremetal and embedded Linux to exercise the full system. Write firmware and low-level system software for on-chip ARM (APU/RPU) or RISC-V cores. Build and customize embedded Linux images using the Yocto-based Embedded Design Flow (BSP configuration, device trees, kernel/rootfs tuning, custom recipes and layers).
Board Bring-Up & Validation: Own new board bring-up from first power-on through a stable platform. Build the scripts, baremetal code, and debug flows the boards team needs to complete bring-up and validation.
Test Development & Automation: Develop validation tests and applications in baremetal and Linux environments, and automate execution and regression to scale coverage.
Debug: Debug complex issues that span silicon, firmware, drivers, and the operating system.
Cross-Team Collaboration & Signoff: Partner with architecture, design, verification, software, product engineering, and board teams. Drive production readiness, issue tracking, risk assessment, and validation signoff.
PREFERRED EXPERIENCE
Hands on embedded systems and hardware validation experience.
Proven board bring-up and validation experience — taking a new board from power-on through boot and interface bring-up, and debugging clocking, reset, power, and hardware issues on the bench.
Strong C/C++ for bare-metal and Linux-based embedded systems on ARM or RISC-V cores; Linux kernel-mode driver knowledge is a strong plus.
Hands-on experience with AMD/Xilinx embedded Linux flows: building and customizing images with the Yocto-based Embedded Design Flow (BSPs, device trees, custom recipes/layers).
Experience validating interfaces such as Ethernet, USB, plus common peripherals like SPI, I²C, UART, and CAN.
Working knowledge of AMD/Xilinx Vitis and EDF environments.
Comfortable automating in Python, Tcl, Shell, and Makefiles, with Git and structured CI/regression workflows.
Strong ownership and communication, with a track record of technical leadership and mentoring.
ACADEMIC CREDENTIALS
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or Computer Science.
LOCATION: San Jose, CA
This role is not eligible for visa sponsorship.
#LI-DR2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
