AMD
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Define and develop the RAS charter for the Embedded BU as a center of excellence.
Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant specification and test cases
Closely work with the Architects and execute the RAS feature enablement and validation with rigour and timeliness
Bigger picture planning for roadmaps and process improvements
Create a cohesive culture of openness, diversity, technical growth for the team members
Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes
Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company
Exhibit great technical depth in the post silicon enablement and validation to take the right technical decisions for the team
13 years of Solid Experience and Knowledge in the HW and FW aspects of RAS feature implementation of x86 IPs like Cores, Memory, In-band and OOB RAS.
Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
Great uplevelling skills to senior management
Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution.
Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW.
Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects.
Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc.
Preferred experience with scripting using TCL, Python
Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills.
Ensuring the program asks for quality and time metrics and feature enablement are met without any glitches, with minimal senior management overseeing.
Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts.
Actively participate in discussions with cross-functional teams in defining and refining test plans and guiding the team for the right path.
Be on top of all issues pertinent to Debug & Triage of any functional issues specific across the entire validation cycle
Drive meetings for issue closures and actively track schedules and milestone quality metrics
Ensure the Best-in-class Documentation and collateral delivery from the team.
Engage with the Post Silicon Enablement, Validation, BIOS/FW, Driver and QA Validation and CAE teams for seamless handing over of RAS Specifications, test plans or reports, as relevant.
Bachelors or Masters degree in electrical or computer engineering
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
Define and develop the RAS charter for the Embedded BU as a center of excellence.
Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant specification and test cases
Closely work with the Architects and execute the RAS feature enablement and validation with rigour and timeliness
Bigger picture planning for roadmaps and process improvements
Create a cohesive culture of openness, diversity, technical growth for the team members
Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes
Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company
Exhibit great technical depth in the post silicon enablement and validation to take the right technical decisions for the team
13 years of Solid Experience and Knowledge in the HW and FW aspects of RAS feature implementation of x86 IPs like Cores, Memory, In-band and OOB RAS.
Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans
Great uplevelling skills to senior management
Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution.
Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW.
Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects.
Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc.
Preferred experience with scripting using TCL, Python
Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills.
Ensuring the program asks for quality and time metrics and feature enablement are met without any glitches, with minimal senior management overseeing.
Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts.
Actively participate in discussions with cross-functional teams in defining and refining test plans and guiding the team for the right path.
Be on top of all issues pertinent to Debug & Triage of any functional issues specific across the entire validation cycle
Drive meetings for issue closures and actively track schedules and milestone quality metrics
Ensure the Best-in-class Documentation and collateral delivery from the team.
Engage with the Post Silicon Enablement, Validation, BIOS/FW, Driver and QA Validation and CAE teams for seamless handing over of RAS Specifications, test plans or reports, as relevant.
Bachelors or Masters degree in electrical or computer engineering
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
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