Key Responsibilities
Responsibilities may include a subset of the following topics
Generate detailed frequency versus power models in collaboration with design, technology, and post‑silicon teams
Work with IP/sub-system teams to meet product targets pre‑ and post‑silicon for performance at power and/or power at performance
Provide feedback and direction to IP teams to drive power and timing optimization efforts and design tradeoffs throughout the project.
Develop bottoms‑up estimates and top‑down power and frequency targets for new IPs and subsystems
Preferred Experience
Experience fostering collaboration with team members within and outside the organization across multiple sites.
Strong data analysis skills and proficiency in Excel and Python
Strong background of VLSI, digital design, and computer architecture concepts
Familiarity with the balance between design, frequency, and power
Knowledge of wafer fabrication technologies and libraries and their respective tradeoffs
Proficiency in silicon test methodologies
Academic Credentials
Master's or PhD degree in Electrical Engineering or a related field
Location
Austin, TX
San Deigo, CA
Santa Clara, CA
Ft. Collins, CO
Boston, MA
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
The Role
Are you passionate about pushing the boundaries of power efficiency and high‑frequency computing?
As a Power and Frequency Modeling Architect within our Central Methodology team, you will have end‑to‑end visibility and ownership across the entire bounding‑box lifecycle, from concept and early targeting, through feasibility and silicon design, to post‑silicon correlation and production.
In this role, you will establish power and timing targets and develop decision‑grade models for AMD's most advanced energy‑efficient high‑performance CPU cores, graphics, and machine‑intelligence chips. The team collaborates broadly across AMD, engaging on programs that span low‑power APUs to the world's most powerful supercomputers, shaping critical architectural and product decisions at every stage.
The Person
In this multifaceted role, you will have the opportunity to work across multiple divisions to define frequency and power targets and drive the modeling throughout the project lifecycle. We're looking for someone with excellent attention to detail, a passion for problem‑solving, and a curiosity to unravel complex issues to achieve outstanding results!
Key Responsibilities
Responsibilities may include a subset of the following topics
Generate detailed frequency versus power models in collaboration with design, technology, and post‑silicon teams
Work with IP/sub-system teams to meet product targets pre‑ and post‑silicon for performance at power and/or power at performance
Provide feedback and direction to IP teams to drive power and timing optimization efforts and design tradeoffs throughout the project.
Develop bottoms‑up estimates and top‑down power and frequency targets for new IPs and subsystems
Preferred Experience
Experience fostering collaboration with team members within and outside the organization across multiple sites.
Strong data analysis skills and proficiency in Excel and Python
Strong background of VLSI, digital design, and computer architecture concepts
Familiarity with the balance between design, frequency, and power
Knowledge of wafer fabrication technologies and libraries and their respective tradeoffs
Proficiency in silicon test methodologies
Academic Credentials
Master's or PhD degree in Electrical Engineering or a related field
Location
Austin, TX
San Deigo, CA
Santa Clara, CA
Ft. Collins, CO
Boston, MA
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
