KEY RESPONSIBILITIES
Perform power and performance analysis across complex SoC and IP designs throughout multiple stages of the design lifecycle.
Analyze application and workload behavior to understand its impact on power, performance, and design tradeoffs.
Develop and enhance methodologies for power estimation, analysis, correlation, and optimization.
Identify power optimization opportunities and collaborate with design teams to evaluate and implement improvements.
Analyze design activity, performance characteristics, and power data to identify key contributors and optimization opportunities.
Develop automation and scalable methodologies that improve the efficiency, consistency, and effectiveness of power analysis.
Partners across architecture, RTL design, verification, physical design, performance, software, and silicon engineering teams to investigate power and performance behavior.
Lead or contribute to complex technical investigations and translate findings into actionable recommendations for engineering teams.
Support the correlation of power and performance behavior across pre-silicon analysis, design implementation, and silicon where applicable.
PREFERRED EXPERIENCE
Experience with semiconductor power and performance analysis.
Experience in one or more areas such as ASIC/SoC power analysis, RTL power analysis and optimization, workload profiling and characterization, performance analysis, power modeling and estimation, physical design and power optimization, or pre-silicon/post-silicon power analysis.
Knowledge of ASIC/SoC design methodologies and the semiconductor design lifecycle.
Experience analyzing complex engineering datasets to identify power, performance, or design trends.
Experience developing automation, analysis flows, or scalable methodologies that improve engineering productivity.
Experience translating technical analysis into practical design or optimization recommendations.
Experience collaborating across engineering disciplines such as architecture, RTL design, verification, physical design, performance, software, and silicon.
ACADEMIC CREDENTIALS
Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is preferred.
LOCATION: Orlando, Florida
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
Join a collaborative engineering team focused on understanding and optimizing power and performance for advanced semiconductor products. In this role, you will have the opportunity to work across the full design lifecycle, gaining visibility into how architecture, workloads, design decisions, and silicon behavior influence product power and performance.
You will be partnered with engineers across architecture, RTL design, verification, physical design, performance, software, and silicon to investigate complex power and performance challenges and identify opportunities for improvement. The role offers a unique opportunity to work across traditional engineering boundaries, develop scalable power-analysis methodologies, and translate technical insights into improvements that can influence future product designs.
THE PERSON
The ideal candidate is a collaborative and analytical engineer who enjoys understanding complex technical problems and turning data into actionable insights. You are curious about how workloads and design decisions influence power and performance and are comfortable partnering with engineers across multiple technical disciplines. You communicate technical findings clearly, approach problems practically, and enjoy developing reusable solutions and methodologies that can benefit a broader engineering organization.
KEY RESPONSIBILITIES
Perform power and performance analysis across complex SoC and IP designs throughout multiple stages of the design lifecycle.
Analyze application and workload behavior to understand its impact on power, performance, and design tradeoffs.
Develop and enhance methodologies for power estimation, analysis, correlation, and optimization.
Identify power optimization opportunities and collaborate with design teams to evaluate and implement improvements.
Analyze design activity, performance characteristics, and power data to identify key contributors and optimization opportunities.
Develop automation and scalable methodologies that improve the efficiency, consistency, and effectiveness of power analysis.
Partners across architecture, RTL design, verification, physical design, performance, software, and silicon engineering teams to investigate power and performance behavior.
Lead or contribute to complex technical investigations and translate findings into actionable recommendations for engineering teams.
Support the correlation of power and performance behavior across pre-silicon analysis, design implementation, and silicon where applicable.
PREFERRED EXPERIENCE
Experience with semiconductor power and performance analysis.
Experience in one or more areas such as ASIC/SoC power analysis, RTL power analysis and optimization, workload profiling and characterization, performance analysis, power modeling and estimation, physical design and power optimization, or pre-silicon/post-silicon power analysis.
Knowledge of ASIC/SoC design methodologies and the semiconductor design lifecycle.
Experience analyzing complex engineering datasets to identify power, performance, or design trends.
Experience developing automation, analysis flows, or scalable methodologies that improve engineering productivity.
Experience translating technical analysis into practical design or optimization recommendations.
Experience collaborating across engineering disciplines such as architecture, RTL design, verification, physical design, performance, software, and silicon.
ACADEMIC CREDENTIALS
Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is preferred.
LOCATION: Orlando, Florida
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
