To own power, performance, area, and jitter budgets of analog design blocks
To mentor sub-block owners and conduct peer reviews of design and verification results
To work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze silicon results
PREFERRED EXPERIENCE
Experience designing 200G+ CMOS transceivers, with a deep understanding of high-speed electrical and/or optical interface requirements.
Demonstrated proficiency in hands-on circuit optimizations, including tuning for power, performance, and area at both block and system levels.
Proven track record in silicon productization—from initial design through to bring-up, validation, and successful ramp to mass production.
ACADEMIC CREDENTIALS
Ph.D. in Electrical Engineering or a related field or M.S. with relevant industrial experience in optical and/or electrical transceiver design.
LOCATION: San Jose, CA
This role is not eligible for visa sponsorship.
#LI-TB2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
AMD Serdes Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking an expert in analog/mixed-signal circuit design and architecture.
THE PERSON
The ideal candidate will have a strong background in advanced ultra-high-speed electrical and/or optical PHY design. She/He needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.
KEY RESPONSIBLITIES
To own performance-critical analog mixed-signal circuit blocks used in Serdes, such as high-speed data converters (DAC and ADC), clocking (reference clock, PLL, clock dividers, mixers, buffers, regulators, multi-phase clock generators, error detection and correction), and analog front-end circuits (pad matching networks, ESD, CTLE, linear amplifier)
To define circuit-driven micro-architectures of Tx and Rx subsystems and drive sub-block level specs.
To own power, performance, area, and jitter budgets of analog design blocks
To mentor sub-block owners and conduct peer reviews of design and verification results
To work with pre-tapeout verification and post-silicon validation teams to bring up silicon and analyze silicon results
PREFERRED EXPERIENCE
Experience designing 200G+ CMOS transceivers, with a deep understanding of high-speed electrical and/or optical interface requirements.
Demonstrated proficiency in hands-on circuit optimizations, including tuning for power, performance, and area at both block and system levels.
Proven track record in silicon productization—from initial design through to bring-up, validation, and successful ramp to mass production.
ACADEMIC CREDENTIALS
Ph.D. in Electrical Engineering or a related field or M.S. with relevant industrial experience in optical and/or electrical transceiver design.
LOCATION: San Jose, CA
This role is not eligible for visa sponsorship.
#LI-TB2
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
