KEY RESPONSIBILITIES
Lead the system validation strategy and technical execution across System Feature Enablement, System Integration, and System Stress Validation for single-node.
Define system-level feature coverage, dependencies, configuration requirements, and exit criteria for RAS, system management, security, networking, telemetry, firmware update and recovery, and platform services.
Architect integrated-system validation across GPU, CPU, NIC, switches, firmware, ROCm, OS/kernel, BMC/AMC, rack infrastructure, orchestration, and production-intended automation.
Lead cross-functional L2/L3 debug spanning GPU, CPU, NIC, switch, firmware, ROCm, OS, manageability, rack infrastructure, and automation layers.
Define validation requirements, entry and exit criteria, blocking-defect thresholds, waiver expectations, release gates, and risk acceptance models.
Use AI tools to improve day-to-day productivity in log analysis, anomaly detection, failure clustering, test generation, automation, data analysis, and documentation.
PREFERRED EXPERIENCE
Strong background in system-level validation, integration, bring-up, qualification, or reliability for complex datacenter CPU/GPU platforms.
Hands-on experience with Linux OS internals, kernel, drivers, ROCm, BMC/AMC, manageability protocols, Redfish, telemetry, firmware update flows, rack integration, and networking.
Experience with single-node, bare-metal, and virtualized environments such as KVM, Hyper-V, or VMware.
Expertise in system feature validation, integration matrices, test-plan architecture, debug methodology, fault injection, sustained stress, soak, negative, and recovery testing.
Proficiency in Python and one or more scripting languages such as Bash.
Experience with large-scale automation, CI, regression, health-check, observability, and log-analysis architectures.
Proven ability to lead cross-functional debug and validation initiatives, influence architecture and release decisions, and mentor engineers.
Strong communication skills, including the ability to present system health, validation gaps, risk, and release recommendations to engineering and program leadership.
Demonstrated ability to convert ambiguous program risk into a practical validation strategy, prioritized execution plan, objective evidence, and clear exit recommendation.
Familiarity with AI concepts, frameworks, or applications for engineering productivity and validation intelligence.
ACADEMIC CREDENTIALS
Bachelor’s or Master’s in Computer Engineering, Computer Science, Electronics, Electrical Engineering, or a similar discipline.
Strong experience in system validation, platform bring-up, system integration, reliability, or datacenter engineering roles
LOCATION
Penang, Malaysia
#LI-CY
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
AMD is seeking a highly skilled and motivated System Validation Lead to join the Data Center GPU organization, driving end-to-end system validation for AMD Instinct platforms. This role bridges system component enablement and program qualification by proving that the fully integrated system is feature-complete, interoperable, stable under sustained stress, and ready to meet System DVT and PVT exit criteria. You will lead validation strategy, architecture, and execution across system feature enablement, system integration, system stress, resilience, and cross-functional debug. You will partner deeply with firmware, ROCm, silicon, platform, networking, manageability, rack, and program teams to detect integration issues early, drive systemic fixes, and provide objective system readiness evidence to the program.
THE PERSON
The ideal candidate brings deep system-level technical expertise, strong technical leadership, and a program-focused validation mindset. You excel at defining system validation scope, building scalable test and stress infrastructure, mentoring engineers, and interpreting cross-domain risks. You are comfortable owning ambiguous integration problems, guiding cross-functional debug, challenging weak readiness signals, and shaping DVT and PVT release-gating criteria. You thrive in fast-moving environments where failures emerge from interactions among hardware, firmware, ROCm, operating systems, networking, manageability, automation, power, thermal, and rack-level behaviors.
KEY RESPONSIBILITIES
Lead the system validation strategy and technical execution across System Feature Enablement, System Integration, and System Stress Validation for single-node.
Define system-level feature coverage, dependencies, configuration requirements, and exit criteria for RAS, system management, security, networking, telemetry, firmware update and recovery, and platform services.
Architect integrated-system validation across GPU, CPU, NIC, switches, firmware, ROCm, OS/kernel, BMC/AMC, rack infrastructure, orchestration, and production-intended automation.
Lead cross-functional L2/L3 debug spanning GPU, CPU, NIC, switch, firmware, ROCm, OS, manageability, rack infrastructure, and automation layers.
Define validation requirements, entry and exit criteria, blocking-defect thresholds, waiver expectations, release gates, and risk acceptance models.
Use AI tools to improve day-to-day productivity in log analysis, anomaly detection, failure clustering, test generation, automation, data analysis, and documentation.
PREFERRED EXPERIENCE
Strong background in system-level validation, integration, bring-up, qualification, or reliability for complex datacenter CPU/GPU platforms.
Hands-on experience with Linux OS internals, kernel, drivers, ROCm, BMC/AMC, manageability protocols, Redfish, telemetry, firmware update flows, rack integration, and networking.
Experience with single-node, bare-metal, and virtualized environments such as KVM, Hyper-V, or VMware.
Expertise in system feature validation, integration matrices, test-plan architecture, debug methodology, fault injection, sustained stress, soak, negative, and recovery testing.
Proficiency in Python and one or more scripting languages such as Bash.
Experience with large-scale automation, CI, regression, health-check, observability, and log-analysis architectures.
Proven ability to lead cross-functional debug and validation initiatives, influence architecture and release decisions, and mentor engineers.
Strong communication skills, including the ability to present system health, validation gaps, risk, and release recommendations to engineering and program leadership.
Demonstrated ability to convert ambiguous program risk into a practical validation strategy, prioritized execution plan, objective evidence, and clear exit recommendation.
Familiarity with AI concepts, frameworks, or applications for engineering productivity and validation intelligence.
ACADEMIC CREDENTIALS
Bachelor’s or Master’s in Computer Engineering, Computer Science, Electronics, Electrical Engineering, or a similar discipline.
Strong experience in system validation, platform bring-up, system integration, reliability, or datacenter engineering roles
LOCATION
Penang, Malaysia
#LI-CY
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
