Reviewing and evaluating package and board design and providing review feedback.
Responsible for providing power delivery solutions across platform, package and SOC level
Definition of worst-case currents and voltage drop scenarios, MIM/decoupling allocation, grid choices and analysis, droop control, SOC ESD compliance, On-die droop detectors, usage of on-die delivery solutions like VR, LDO, and Power gates.
Bachelor's degree in Electrical Engineering or a related field
4+ years of hardware design and validation of components, subsystems and systems experience
High speed serial interface analog building blocks, protocol, specifications and test methods
Familiarity with Simulation tools (ADS, HFSS, PowerSI, PowerDC, Hyperlynx) to execute SI-PI simulations is required.
Experience with performing measurement, and correlating measurements to simulations.
Experience with modeling and simulation of high-speed interface interconnects/channel.
Excellent analytical and problem solving skills
Master's degree in Electrical or Communications Engineering or a related field
Understanding of Power & signal integrity concepts such as differential impedance, jitter, insertion loss, return loss, termination, etc.
Scripting experience in any programming language (C++, Python, PERL, MATLAB) to develop automation scripts is a plus.
Experience in Analog IP Characterization (SerDes, PLL, DDR) is desirable.
Good understanding of High-Speed Analog/Digital Circuits, VLSI, semiconductor physics
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