Lead triage, debug and root cause analysis of systems in AWS data centers
Analyze customers` mode of work / requirements and provide resolutions accordingly
Cooperate with multiple AWS teams to improve quality and reliability of products operation in the fleet
Provide Annapurna Labs’ ASIC design, SW development, QA and architecture teams information and requirements from customers’ fleet operation perspectives and represent the customer voice
About the team
Our SPIV team owns the performance and reliability of PCIe and Ethernet across every AWS server. We work end-to-end across the full product lifecycle, including:
Pre-silicon IP vendor engagement
post-silicon bring-up and interface optimization
SerDes, firmware, and system-level debug
Interface manufacturing test integration
Fleet health monitoring and customer performance
Interoperability with third-party components - retimer, switch, active cable, and optics
In partnership with chip design, Server design and Cloud health teams, you will validate new server platform generations; root-cause failures across hardware, firmware, and software boundaries and drive quality improvements that protect millions of customer workloads.
If you are a systems, hardware, or software engineer who thrives at the intersection of silicon, firmware, and server infrastructure — and wants your work to improve reliability across a global fleet — apply now.
B.Sc. in Electrical Engineering, Computer Engineering or in related field.
5+ years of HW Design Experience or in Functional or Electrical Integration/ Validation/ Debug
2+ years’ experience working with systems and experience with their SW, FW and HW components
High-speed interfaces knowledge and debug capabilities.
Knowledge on PCIe
Large scale data analysis
Experience with server design and computer systems architecture.
Experience with operating systems, boot loaders, networking, and remote debugging.
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