As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.
Watch these videos to learn more about Annapurna Labs and the Nitro project:
AWS re:Invent 2025 - Keynote with Peter DeSantis and Dave Brown: https://www.youtube.com/watch?v=JeUpUK0nhC0
AWS re:Invent 2025 - Deep Dive into the AWS Nitro System https://www.youtube.com/watch?v=cD1mNQ9YbeA
Key job responsibilities
Full ownership of one or more IPs within the product
Micro-architecture
RTL coding and debug
Synthesis and timing closure
Sign-off
Supporting the Verification and Emulation teams: Test plan, Coverage review
Ensuring that the chip meets quality and reliability standards
Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design
4+ years of experience in chip design
Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog)
BSc in Electrical Engineering/Computer Engineering/Computer Science
Background in protocols (AXI, CHI, DDR, Networking, PCIe)
knowledge of Network-on-Chip (NOC) architecture
Experience with coherent and non-coherent fabric design
Experience with the entire SoC cycle – Synthesis / STA / CDC / Lint
Experience with Design Automation tools and techniques
Advanced degree in related technical field
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